A White Paper by Khaled A.B. Aly © SilMinds Inc.
The continuously increasing business dependence on IT services has resulted in a proportional increase of data centers number, scale, and server density. In particular, financial and other monetary related applications are characterized by large percentages of intense decimal floating point computations, which are bound by stringent regulatory precision requirements. These applications typically utilize a software layer to handle the required floating point precision and the conversions between binary hardware and decimal input and output data, resulting in excessive processing delay.
Coprocessor decimal floating point hardware acceleration is a flexible and inexpensive approach that enables direct processing in decimal format. DFP overall computation time speedup close to 20~30 times can be achieved, depending on application profile and accelerator’s dimensioning. With up to 90% of many financial applications’ time spent on performing DFP arithmetic, the savings could be very significant. Savings result from the reduction of the time needed to accomplish the DFP computation workloads on the hardware accelerator in comparison to the time needed to accomplish them on the sever CPU by software.
Total cost of ownership can be cut down at both capital and operational expenditure levels thanks to DFP arithmetic speedup. Proportional cut down of consumed energy, and hence complying with regulatory requirements for contribution to harmful gas emissions, is equally achieved. These reachable cut downs imply relaxed hardware dimensioning, infrastructure, and real estate; as well as reduction in operational costs related to energy consumption and service management. The result is more economic data center operation, opening doors for perhaps previously unforeseen business opportunities.